{"id":2659,"date":"2019-06-19T01:06:50","date_gmt":"2019-06-19T01:06:50","guid":{"rendered":""},"modified":"2019-06-19T09:07:06","modified_gmt":"2019-06-19T01:07:06","slug":"intel%e6%9c%80%e6%96%b0%e6%8e%a8%e5%87%ba%e9%a6%96%e6%ac%be%e6%9d%bf%e8%bd%bdfpga%e7%9a%84cpu","status":"publish","type":"post","link":"http:\/\/www.szryc.com\/?p=2659","title":{"rendered":"Intel\u6700\u65b0\u63a8\u51fa\u9996\u6b3e\u677f\u8f7dFPGA\u7684CPU"},"content":{"rendered":"

\n\t\u636e\u62a5\u9053\uff0c\u82f1\u7279\u5c14<\/u>\u5ba3\u5e03\u63a8\u51fa\u9996\u6b3e\u91c7\u7528\u96c6\u6210FPGA<\/u>\u7684Xeon\u53ef\u5347\u7ea7\u5904\u7406\u5668\uff0c\u4f9b\u7279\u5b9a\u5ba2\u6237\u4f7f\u7528\u3002\u81f3\u5f3a\u53ef\u6269\u5c556138P\u5305\u62ec\u91c7\u7528\u82f1\u7279\u5c14\u8d85\u7ea7\u8def\u5f84\u4e92\u8fde\uff08UPI<\/u>\uff09\u8fde\u63a5\u5230CPU<\/u>\u88f8\u7247\u7684Arria 10 GX 1150 FPGA\u5c01\u88c5\u3002\u636e\u82f1\u7279\u5c14\u516c\u53f8\u79f0\uff0cUPI\u53ef\u4ee5\u63d0\u4f9b\u8fd9\u4e9b\u82af\u7247\u7684\u8fde\u8d2f\u548c\u76f4\u63a5\u8bbf\u95ee\u5904\u7406\u5668\u6216FPGA\u9ad8\u901f\u7f13\u5b58\u548c\u4e3b\u5185\u5b58\u4e2d\u7684\u6570\u636e\uff0c\u800c\u4e0d\u9700\u8981\u76f4\u63a5\u5185\u5b58\u8bbf\u95ee\u6216\u6570\u636e\u590d\u5236\u7684\u5f00\u9500\u3002<\/p>\n

\n\t\"Intel\u6700\u65b0\u63a8\u51fa\u9996\u6b3e\u677f\u8f7dFPGA\u7684CPU\"<\/p>\n

\n\t <\/div>\n

\n\tArria 10 GX 1150\u662f\u5176\u7cfb\u5217\u4e2d\u6027\u80fd\u6700\u5f3a\u7684FPGA\uff0c\u5176\u4e2d\u5305\u62ec115\u4e07\u4e2a\u53ef\u7f16\u7a0b\u903b\u8f91\u5143\u4ef6\uff0c42\u4e077200\u4e2a\u81ea\u9002\u5e94\u903b\u8f91\u6a21\u5757\uff0c\u7528\u4e8e\u9ad8\u6548\u6784\u5efa\u7279\u5b9aLUT\uff0c96\u4e2a17.4-Gbps\u6536\u53d1\u5668<\/u>\u548c768\u4e2aGPIO\u5f15\u811a\u7b49\u529f\u80fd\u3002 Intel<\/u>\u5e76\u672a\u6307\u5b9aArria 10 GX 1150\u9644\u5e26\u7684Xeon\u82af\u7247\uff0c\u4f46\u6807\u51c6Gold 6138\u662f\u4e00\u6b3e20\u6838\u5fc3\uff0c40\u7ebf\u7a0b\u82af\u7247\uff0c\u5177\u67092 GHz\u57fa\u672c\u65f6\u949f<\/u>\u548c3.7 GHz Turbo\u9891\u7387\uff0c\u529f\u7387\u4e3a125 W TDP\u3002<\/p>\n

\n\t\u4f5c\u4e3a\u5ba2\u6237\u5982\u4f55\u4f7f\u7528Xeon 6138P\u7684\u4e00\u4e2a\u4f8b\u5b50\uff0c\u82f1\u7279\u5c14\u521b\u5efa\u4e86\u4e00\u4e2a\u865a\u62df\u4ea4\u6362\u53c2\u8003\u5e73\u53f0\uff0c\u8be5\u5e73\u53f0\u4f7f\u7528\u82af\u7247\u7684FPGA\u90e8\u5206\u8fdb\u884c\u57fa\u7840\u67b6\u6784\u6570\u636e\u5e73\u9762\u4ea4\u6362\uff0c\u540c\u65f6CPU\u8fd0\u884c\u5176\u901a\u5e38\u7684\u5e94\u7528\u7a0b\u5e8f\u6216\u865a\u62df\u673a\u3002\u6b63\u5982\u6211\u4eec\u6240\u9884\u6599\u7684\u90a3\u6837\uff0c\u5c06\u8f6f\u4ef6\u5b9a\u4e49\u7684\u7f51\u7edc\u8d1f\u8f7d\u5378\u8f7d\u5230FPGA\u663e\u7136\u63d0\u4f9b\u4e86\u6bd4\u5355\u72ec\u5904\u7406\u8fd9\u4e24\u79cd\u5de5\u4f5c\u8d1f\u8f7d\u66f4\u597d\u7684\u6027\u80fd\u3002<\/p>\n

\n\t\"Intel\u6700\u65b0\u63a8\u51fa\u9996\u6b3e\u677f\u8f7dFPGA\u7684CPU\"<\/p>\n

\n\t\u82f1\u7279\u5c14\u8fd8\u6307\u51fa\uff0c6138P\u4e0e\u7528\u4e8e\u865a\u62df\u673a\u73af\u5883\u7684\u5f00\u653e\u5f0f\u865a\u62df\u4ea4\u6362\u673a<\/u>\u8f6f\u4ef6\u5b9a\u4e49\u7684\u591a\u5c42\u4ea4\u6362\u673a\u517c\u5bb9\uff0c\u5e76\u58f0\u79f0\u5728\u8be5\u82af\u7247\u4e0a\u8fd0\u884c\u7684OVS\u5b9e\u73b0\u53ef\u63d0\u4f9b3.2\u500d\u7684\u541e\u5410\u91cf\u63d0\u5347\uff0c\u4ee5\u53ca\u975eFPGA\u52a0\u901f\u7684\u4e00\u534a\u5ef6\u8fdf\u3002<\/p>\n

\n\t\u82f1\u7279\u5c14\u8868\u793a\uff0c\u5bcc\u58eb\u901a<\/u>\u662fXeon 6138P\u7684\u4e3b\u8981\u5408\u4f5c\u4f19\u4f34\uff0c\u8be5\u516c\u53f8\u8ba1\u5212\u5c06\u5176\u81ea\u5df1\u7684\u53ef\u9760\u6027\uff0c\u53ef\u7528\u6027\u548c\u53ef\u670d\u52a1\u6027\uff08RAS\uff09\u7279\u6b8a\u8c03\u914d\u4e0eXeon 6138P\u5904\u7406\u5668\u914d\u5bf9\uff0c\u7528\u4e8e\u8f6f\u4ef6\u5b9a\u4e49\u7684\u7f51\u7edc\u57fa\u7840\u8bbe\u65bd\u8bbe\u5907\u3002\u5bcc\u58eb\u901a\u5c06\u5728\u672c\u5468\u5728\u4e1c\u4eac\u7684\u5bcc\u58eb\u901a\u8bba\u575b\u4e0a\u5c55\u793a\u5176\u57fa\u4e8e6138P\u7684\u4ea7\u54c1\u3002<\/p>\n","protected":false},"excerpt":{"rendered":"

\u636e\u62a5\u9053\uff0c \u82f1\u7279\u5c14 \u5ba3\u5e03\u63a8\u51fa\u9996\u6b3e\u91c7\u7528\u96c6\u6210 FPGA \u7684Xeon\u53ef\u5347\u7ea7\u5904\u7406\u5668\uff0c\u4f9b\u7279\u5b9a\u5ba2\u6237\u4f7f\u7528\u3002\u81f3\u5f3a\u53ef\u6269\u5c556138P\u5305\u62ec\u91c7\u7528\u82f1\u7279\u5c14\u8d85\u7ea7\u8def\u5f84\u4e92\u8fde\uff08U PI \uff09\u8fde\u63a5\u5230 CPU \u88f8\u7247\u7684Arria 10 GX 1150 FPGA\u5c01\u88c5\u3002\u636e\u82f1\u7279<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[10],"tags":[],"_links":{"self":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts\/2659"}],"collection":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=2659"}],"version-history":[{"count":0,"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts\/2659\/revisions"}],"wp:attachment":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=2659"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=2659"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=2659"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}