{"id":2187,"date":"2019-03-08T01:15:40","date_gmt":"2019-03-08T01:15:40","guid":{"rendered":""},"modified":"2019-03-08T09:16:09","modified_gmt":"2019-03-08T01:16:09","slug":"%e5%85%b3%e4%ba%8efpga%e7%9a%84%e4%b8%89%e7%a7%8d%e7%94%b5%e6%ba%90%e9%9c%80%e6%b1%82%e6%b5%85%e6%9e%90","status":"publish","type":"post","link":"http:\/\/www.szryc.com\/?p=2187","title":{"rendered":"\u5173\u4e8eFPGA\u7684\u4e09\u79cd\u7535\u6e90\u9700\u6c42\u6d45\u6790"},"content":{"rendered":"

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\n\tVCCINT\uff1a\u6838\u5fc3\u5de5\u4f5c\u7535\u538b\uff0cPCI Express \uff08PCIe\uff09 \u786c\u6838IP \u6a21\u5757\u548c\u6536\u53d1\u5668<\/u>\u7269\u7406\u7f16\u7801\u5b50\u5c42\uff08PCS\uff09 \u7535\u6e90\u3002\u4e00\u822c\u7535\u538b\u90fd\u5f88\u4f4e\uff0c\u76ee\u524d\u5e38\u7528\u7684FPGA\u90fd\u57281.2V\u5de6\u53f3\u3002\u4e3aFPGA\u7684\u5185\u90e8\u5404\u79cd\u903b\u8f91\u4f9b\u7535\uff0c\u7535\u6d41<\/u>\u4ece\u51e0\u767e\u6beb\u5b89\u5230\u51e0\u5b89\u4e0d\u7b49\uff0c\u5177\u4f53\u53d6\u51b3\u4e8e\u5185\u90e8\u903b\u8f91\u7684\u5de5\u4f5c\u65f6\u949f<\/u>\u901f\u7387\u4ee5\u53ca\u6240\u5360\u7528\u7684\u903b\u8f91\u8d44\u6e90\u3002\u5bf9\u4e8e\u8fd9\u4e2a\u7535\u6e90\u6765\u8bf4\uff0c\u8d1f\u8f7d\u65f6\u4e00\u4e2a\u9ad8\u5ea6\u5bb9\u6027\u963b\u6297\uff0c\u5bf9\u7535\u6e90\u7684\u77ac\u6001\u54cd\u5e94\u8981\u6c42\u5f88\u9ad8\uff0c\u800c\u4e14\u7531\u4e8e\u9a71\u52a8\u7535\u538b\u4f4e\u5de5\u4f5c\u7535\u6d41\u5927\uff0c\u5bf9PCB<\/u>\u7684\u5e03\u7ebf\u7535\u963b<\/u>\u975e\u5e38\u654f\u611f\uff0c\u9700\u8981\u7279\u522b\u6ce8\u610f\u8d70\u7ebf\u5bbd\u5ea6\uff0c\u5c3d\u53ef\u80fd\u51cf\u5c11\u5e03\u7ebf\u7535\u963b\u5e26\u6765\u7684\u635f\u8017\u3002<\/p>\n

\n\t <\/div>\n

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\n\tVCCD_PLL\uff1a\u901a\u5e38\u4e3a1.2V\uff0cPLL\u6570\u5b57\u7535\u6e90<\/u>\u3002<\/p>\n

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\n\tVCC_CLKIN\uff1a\u652f\u63011.2\uff0c1.5\uff0c1.8\uff0c2.5\uff0c3.0\uff0c3.3\u3002\u4e3b\u8981\u4e3a\u5dee\u5206\u65f6\u949f\u8f93\u5165\u7ba1\u811a\u4f9b\u7535\u3002<\/p>\n

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\n\tVCCL_GXB\uff1a1.2V\uff0c\u6536\u53d1\u5668PMA \u53ca\u8f85\u52a9\u7535\u6e90\u3002<\/p>\n","protected":false},"excerpt":{"rendered":"

FPGA \u662f\u4e00\u79cd\u591a\u7535\u6e90\u9700\u6c42\u7684\u82af\u7247\uff0c\u4e3b\u8981\u67093\u79cd\u7535\u6e90\u9700\u6c42\uff1a VCCINT\uff1a\u6838\u5fc3\u5de5\u4f5c\u7535\u538b\uff0cPCI Express \uff08PCIe\uff09 \u786c\u6838IP \u6a21\u5757\u548c \u6536\u53d1\u5668 \u7269\u7406\u7f16\u7801\u5b50\u5c42\uff08PCS\uff09 \u7535\u6e90\u3002\u4e00\u822c\u7535\u538b\u90fd\u5f88\u4f4e\uff0c\u76ee\u524d\u5e38\u7528\u7684FPGA\u90fd\u57281.<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[18],"tags":[],"_links":{"self":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts\/2187"}],"collection":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=2187"}],"version-history":[{"count":0,"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts\/2187\/revisions"}],"wp:attachment":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=2187"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=2187"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=2187"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}